整流器仿真报错,Error in port widths or dimensions

budong123 · 发表于 2011-6-6 15:23

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本帖最后由 budong123 于 2011-6-6 19:39 编辑

小弟菜鸟一个，最近做一整流器仿真，遇到下列错误，请各位高手帮忙看看！
Error in port widths or dimensions. Invalid dimension has been specified for input port 2 of 'VSR/Discrete SV PWM Generator/SV Modulator Pattern #1/Compute time duration of switching states (Ta,Tb,To) /Product'#1/Compute time duration of switching states (Ta,Tb,To) /Product'.
Error in port widths or dimensions. Invalid dimension has been specified for output port 1 of 'VSR/Discrete SV PWM Generator/SV Modulator Pattern #1/Compute time duration of switching states (Ta,Tb,To) /Mux'#1/Compute time duration of switching states (Ta,Tb,To) /Mux'.

budong123 · 发表于 2011-6-7 14:05

budong123 · 发表于 2011-6-8 20:10

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[基本模块类] 整流器仿真报错,Error in port widths or dimensions